System Architecture for Next Generation Device-Centric Servers

This was another project I contributed to as a PhD student. This project took roughly four years (2013-2018) and involved multiple PhD students. It later became one of the foundations of a startup named MangoBoost in South Korea.

Brief Description: Emerging workloads are data intensive and rely on fast IO devices (SSDs, fast NICs,GPUs, etc) and communication between them. However, conventional CPU-centric server architecture cannot exploit the low latency and high bandwidth of fast emerging IO devices. Some existing work reduced this overhead by OS kernel bypassing and integrating multiple IO devices on one chip. However, the scalability for these approaches are limited. They either have some overheads on the CPU (e.g., multiple user-kernel level crossing) or cannot work with off-the-shelf devices. Therefore, we propose a device-centric architecture with novel device-control mechanisms to resolve such problems. Our proposed system relieves the CPU and host-side overheads by providing direct peer-to-peer communication among IO devices and offloading certian IO device management tasks to a dedicated FPGA. Our FPGA-based engine implements standardized IO interface to work with off-the-shelf devices and provide low-latency direct device to device communications. Furthermore, our FPGA-based engine can also be used for additional data processing acceleration (e.g., encryption) on the the data in-transfer without any additional transfer to the CPU. Overall, our proposed system significantly accelerates major applications. This project resulted in two publications in top conferences MICRO’15 and ISCA’18.